Angsuman Roy

Passive RC Sigma-Delta Modulator in 500 nm CMOS (2014)

This was my first chip design. I laid it out in Electric VLSI and it was fabricated in OnSemi's 500 nm C5 CMOS process. The chip contains a few lumped RC versions of my passive 2nd order sigma-delta modulator topology as well as building blocks such as clock generators and comparators. For more details please see my thesis and the paper I wrote on the topic. Click on the images in the gallery below to enlarge.

​